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? 2010 semtech corporation SC662 backlight driver for 6 leds with sempulse ? interface power management 1 sc 662 in spif gnd out bl 1 c in 1 . 0 f c 1 + from microprocessor c out 1 . 0 f c 2 1 . 0 f c 1 1 . 0 f bl 2 bl 3 bl 4 c 2 + c 1 - c 2 - bl 5 bl 6 features input supply voltage range 2.9v to 5.5v very high efciency charge pump driver system with three modes 1x, 1.5x and 2x six programmable current sinks 0ma to 25ma up to three led grouping options fade-in/fade-out feature for main led bank selectable charge pump frequency 250khz/1mhz sempulse ? single wire interface backlight current accuracy 1.5% typical backlight current matching 0.5% typical led foat detection automatic sleep mode with all leds of sleep mode quiescent current 60a typical shutdown current 0.1a typical ultra-thin package 2 x 2 x 0.6 (mm) lead-free and halogen-free weee and rohs compliant applications cellular phones, smart phones, and pdas lcd modules portable media players digital cameras personal navigation devices display/keypad backlighting and led indicators ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? description the SC662 is a high efciency charge pump led driver using semtechs proprietary charge pump technology. performance is optimized for use in single-cell li-ion battery applications. the charge pump provides backlight current utilizing six matched current sinks. the load and supply conditions determine whether the charge pump operates in 1x, 1.5x, or 2x mode. an optional fading feature that gradually adjusts the backlight current is provided to simplify control software. the SC662 uses the proprietary sempulse ? single wire interface to control all functions of the device, including backlight currents. the single wire interface minimizes microcontroller and interface pin counts. the six leds can be grouped in up to three separate banks that can be independently controlled. the charge pump switches at 1mhz or 250khz, and the frequency is selectable using the sempulse interface. both 1mhz and 250khz frequencies are supported by 0402 size (1005 metric) ceramic capacitors. the SC662 enters sleep mode when all the led drivers are disabled. in this mode, the quiescent current is reduced while the device continues to monitor the sempulse interface. november 30, 2010 typical application circuit
SC662 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 bl 6 spif gnd c 1 - c 2 - c 2 + c 1 + out in bl 1 bl 2 bl 3 bl 4 bl 5 top view t device package SC662ultrt (1)(2) mlpq-ut-14 22 SC662evb evaluation board ... fb yw fbf=fSC662ultrt ywf=fdatefcode pin confguration marking information ordering information notes: (1) available in tape and reel only. a reel contains 3,000 devices. (2) lead-free packaging only. device is weee and rohs compliant, and halogen-free. mlpq-ut-14;f2x2,f14flead ja f=f78c/w
SC662 3 parameter symbol conditions min typ max units supply specifcations shutdown current i q(off) 0.1 2 a total quiescent current i q all outputs disabled, spif = v in (2) 60 a 1x mode, all leds on, i bln = 0.5ma 0.9 ma 1x mode, all leds on, i bln = 25ma 1.5 1.5x or 2x charge pump mode, all leds on, i bln = 25ma 2 charge pump electrical specifcations maximum total output current i out(max) v in > 2.9v, sum of all active led currents, v out(max) = 4.2v 150 ma backlight current setting i bln nominal setting for bl1 thru bl6 0 25 ma backlight current matching i bl-bl i bln = 12ma (3) -3.5 0.5 +3.5 % backlight current accuracy i bl_acc i bln = 12ma 1.5 % mode transition (falling) input voltage 1x mode to 1.5x mode v trans1x i out = 72ma, i bln = 12ma, v out = 3.22v 3.28 v 1.5x mode to 1x mode hysteresis v hyst1x i out = 72ma, i bln = 12ma, v out = 3.22v, f pump = 250khz 250 mv exceeding the above specifcations may result in permanent damage to the device or device malfunction. operation outside of the parameters specifed in the electrical characteristics section is not recommended. notes: (1) tested according to jedec standard jesd22-a114 (2) calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer fr4 pcb per jesd51 standards. absolute maximum ratings in, out (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 c1+, c2+ (v) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (v out + 0.3) pin voltage all other pins (v) . . . . . . . . -0.3 to (v in + 0.3) out short circuit duration . . . . . . . . . . . . . . . . continuous esd protection level (1) (kv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 unless otherwise noted, t a = +25c for typ, -40c to +85c for min and max, t j(max) = 125c, v in = 3.7 v, c in = c 1 = c 2 = c out = 1.0f (esr = 0.03) (1) recommended operating conditions ambient temperature range (c) . . . . . . . . -40 t a +85 input voltage (v) . . . . . . . . . . . . . . . . . . . . . . . 2.9 v in 5.5 output voltage (v) . . . . . . . . . . . . . . . . . . . . . 2.5 v out 5.25 thermal information thermal resistance, junction to ambient (2) (c/w) . . 78 storage temperature range (c) . . . . . . . . . . . . -65 to +150 peak ir refow temperature (10s to 30s) (c) . . . . . . +260 electrical characteristics
SC662 4 parameter symbol conditions min typ max units charge pump electrical specifcations (continued) mode transition (falling) input voltage 1.5x mode to 2x mode v trans1.5x i out = 72ma, i bln = 12ma, v out = 4.2v (4) , f pump = 250khz 3.14 v current sink of-state leakage current i bln(of ) v in = v bln = 4.2v 0.1 1 a charge pump frequency f pump bit fsel = 0 250 khz bit fsel = 1 1 mhz fault protection specifcations output short circuit current limit i out(sc) out pin shorted to gnd 125 ma v out > 2.5v 300 under voltage lockout v uvlo-off increasing v in 2.3 v v uvlo-hys hysteresis 75 mv over-voltage protection v ovp out pin open circuit, v out = v ovp , rising threshold 5.7 6.0 v over-temperature threshold t ot rising temperature 165 c t ot-hys hysteresis 20 c electrical characteristics (continued)
SC662 5 parameter symbol conditions min typ max units sempulse interface input high threshold v ih v in = 5.5v 1.4 v input low threshold v il v in = 2.9v 0.4 v input high current i ih v in = 5.5v -1 +1 a input low current i il v in = 5.5v -1 +1 a start up time (5) t su only required when leaving shutdown mode 1 ms bit pulse duration (6) t hi 0.75 250 s duration between pulses (6) t lo 0.75 250 s hold time - address (6) t holda 550 5000 s hold time - data (6) t holdd 550 s bus reset time (6) t br 10 ms shutdown time (7) t sd 10 ms notes: (1) capacitors are mlcc of x5r type. (2) spif is high for more than 10ms to place the serial bus in standby mode. (3) current matching is defned as [i bl(max) - i bl(min ] / [i bl(max) + i bl(min) ]. (4) test voltage is v out = 4.2v a relatively extreme led voltage to force a transition during test. typically v f = 3.2v for white leds. (5) the sempulse start-up time is the minimum time that the spif pin must be held high to enable the part before starting communication. (6) the source driver used to provide the sempulse output must meet these limits. (7) the sempulse shutdown time is the minimum time that the spif pin must be pulled low to shut the part down. electrical characteristics (continued)
SC662 6 typical characteristics f pump = 1 mhz , v out = 3 . 42 v , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c v in ( v ) e f f i c i e n c y ( % ) 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlight charge pump chargefpumpfefciencyf(6fleds)ff12mafeach f pump = 1 mhz , v out = 3 . 56 v , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c e f f i c i e n c y ( % ) v in ( v ) 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 charge pump backlight chargefpumpfefciencyf(6fleds)ff25mafeach f pump = 1 mhz , v out ( see note ) , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c v in ( v ) e f f i c i e n c y ( % ) 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 charge pump backlight chargefpumpfefciencyf(6fleds)ff5mafeach f pump = 250 khz , v out = 3 . 55 v , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c backlight v in ( v ) e f f i c i e n c y ( % ) 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 charge pump chargefpumpfefciencyf(6fleds)ff25mafeach f pump = 250 khz , v out = 3 . 41 v , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c v in ( v ) e f f i c i e n c y ( % ) 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlight charge pump chargefpumpfefciencyf(6fleds)ff12mafeach v in ( v ) e f f i c i e n c y ( % ) 50 60 70 80 90 100 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 charge pump backlight f pump = 250 khz , v out ( see note ) , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c chargefpumpfefciencyf(6fleds)ff5mafeach notes: (1) efciency labels charge pump and backlight are defned on page 13 under the sub-heading charge pump efciency. (2) plots shown for 5ma data have v out = 3.27v when in 1.5x and 2x modes, and v out = v in - 55mv when in 1x mode. v out is connected internally to v in only when the charge pump is in 1x mode and i bl 5ma. (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) (2) (2)
SC662 7 f pump = 1 mhz , v out = 3 . 41 v , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c v in ( v ) m a t c h i n g ( % ) - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfmatchingf(6fleds)ff12mafeach f pump = 1 mhz , v out = 3 . 55 v , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c v in ( v ) m a t c h i n g ( % ) - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfmatchingf(6fleds)ff25mafeach f pump = 1 mhz , v out ( see note ) , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c v in ( v ) m a t c h i n g ( % ) - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfmatchingf(6fleds)ff5mafeach f pump = 250 khz , v out = 3 . 55 v , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c v in ( v ) m a t c h i n g ( % ) - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfmatchingf(6fleds)ff25mafeach f pump = 250 khz , v out = 3 . 41 v , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c v in ( v ) m a t c h i n g ( % ) - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfmatchingf(6fleds)ff12mafeach v in ( v ) m a t c h i n g ( % ) - 3 - 2 - 1 0 1 2 3 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 f pump = 250 khz , v out ( see note ) , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c backlightfmatchingf(6fleds)ff5mafeach typical characteristics (continued) (2) (2) notes: (1) efciency labels charge pump and backlight are defned on page 13 under the sub-heading charge pump efciency. (2) plots shown for 5ma data have v out = 3.27v when in 1.5x and 2x modes, and v out = v in - 55mv when in 1x mode. v out is connected internally to v in only when the charge pump is in 1x mode and i bl 5ma.
SC662 8 f pump = 1 mhz , v out = 3 . 41 v , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c v in ( v ) a c c u r a c y ( % ) a cc max % a cc min % - 8 - 6 - 4 - 2 0 2 4 6 8 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfaccuracyf(6fleds)ff12mafeach f pump = 1 mhz , v out = 3 . 55 v , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c v in ( v ) a c c u r a c y ( % ) a cc max % a cc min % - 8 - 6 - 4 - 2 0 2 4 6 8 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfaccuracyf(6fleds)ff25mafeach v in ( v ) a c c u r a c y ( % ) a cc max % a cc min % - 8 - 6 - 4 - 2 0 2 4 6 8 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 f pump = 1 mhz , v out ( see note ) , c in = c out = c 1 = c 2 = 0 . 47 f ( 0402 ) , t a = 25 c backlightfaccuracyf(6fleds)ff5mafeach f pump = 250 khz , v out = 3 . 55 v , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c a cc max % v in ( v ) a c c u r a c y ( % ) - 8 - 6 - 4 - 2 0 2 4 6 8 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 a cc min % backlightfaccuracyf(6fleds)ff25mafeach f pump = 250 khz , v out = 3 . 41 v , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c a cc max % a cc min % v in ( v ) a c c u r a c y ( % ) - 8 - 6 - 4 - 2 0 2 4 6 8 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 backlightfaccuracyf(6fleds)ff12mafeach v in ( v ) a c c u r a c y ( % ) - 8 - 6 - 4 - 2 0 2 4 6 8 2 . 7 3 3 . 3 3 . 6 3 . 9 4 . 2 a cc min % a cc max % f pump = 250 khz , v out ( see note ) , c in = c out = c 1 = c 2 = 1 . 0 f ( 0402 ) , t a = 25 c backlightfaccuracyf(6fleds)ff5mafeach typical characteristics (continued) notes: (1) efciency labels charge pump and backlight are defned on page 13 under the sub-heading charge pump efciency. (2) plots shown for 5ma data have v out = 3.27v when in 1.5x and 2x modes, and v out = v in - 55mv when in 1x mode. v out is connected internally to v in only when the charge pump is in 1x mode and i bl 5ma. (2) (2)
SC662 9 all data taken with t a = 25c, 6 leds @ 15ma each unless otherwise noted. time (1 s?div) s?div) ?div) v in (100mv/div) f pump = 1mhz, c in = c out = c 1 = c 2 = 0.47f (0402) rippleff1xfmode v out (100mv/div) i bl (20ma/div) time (1 s?div) s?div) ?div) v in (100mv/div) f pump = 1mhz, c in = c out = c 1 = c 2 = 0.47f (0402) rippleff1.5xfmode v out (100mv/div) i bl (20ma/div) time (1 s?div) s?div) ?div) v in (100mv/div) f pump = 1mhz, c in = c out = c 1 = c 2 = 0.47f (0402) rippleff2xfmode v out (100mv/div) i bl (20ma/div) time (2 s?div) s?div) ?div) v in (100mv/div) f pump = 250khz, c in = c out = c 1 = c 2 = 1.0f (0402) rippleff1xfmode v out (100mv/div) i bl (20ma/div) time (2 s?div) s?div) ?div) v in (100mv/div) f pump = 250khz, c in = c out = c 1 = c 2 = 1.0f (0402) rippleff1.5xfmode v out (100mv/div) i bl (20ma/div) time (2 s?div) s?div) ?div) v in (100mv/div) f pump = 250khz, c in = c out = c 1 = c 2 = 1.0f (0402) rippleff2xfmode v out (100mv/div) i bl (20ma/div) typical characteristics (continued) 0ma 0ma 0ma 0ma 0ma 0ma
SC662 10 pin # pin name pin function 1 bl6 current sink output for backlight led 6 leave this pin open if unused 2 spif sempulse single wire interface pin used to enable/disable the device and to confgure all regis - ters (refer to register map and sempulse interface sections) 3 gnd ground pin 4 c1- negative connection to bucket capacitor c 1 5 c2- negative connection to bucket capacitor c 2 6 c2+ positive connection to bucket capacitor c 2 7 c1+ positive connection to bucket capacitor c 1 8 out charge pump output all led anode pins should be connected to this pin 9 in battery voltage input 10 bl1 current sink output for backlight led 1 leave this pin open if unused 11 bl2 current sink output for backlight led 2 leave this pin open if unused 12 bl3 current sink output for backlight led 3 leave this pin open if unused 13 bl4 current sink output for backlight led 4 leave this pin open if unused 14 bl5 current sink output for backlight led 5 leave this pin open if unused t thermal pad thermal pad for heatsinking purposes connect to ground plane using multiple vias not con - nected internally pin descriptions
SC662 11 oscillator current setting dac sempulse digital interface and logic control fractional charge pump ( 1 x , 1 . 5 x , 2 x ) c 1 + c 1 - c 2 + c 2 - out bl 1 bl 2 bl 3 bl 4 in spif gnd 7 5 6 4 9 2 3 8 10 11 12 13 bl 5 bl 6 14 1 block diagram
SC662 12 general description this design is optimized for handheld applications sup - plied from a single li-ion cell and includes the following key features: a high efciency fractional charge pump that supplies power to all leds. six matched current sinks that control led back - lighting current, providing 0ma to 25ma per led. up to three independently controlled led banks. selectable charge pump frequency 250khz or 1mhz options. high current fractional charge pump the backlight outputs are supported by a high efciency, high current fractional charge pump output. the charge pump multiplies the input voltage by 1x, 1.5x, or 2x. the output of the charge pump is delivered to the led anodes. the charge pump switches only in 1.5x and 2x modes and is disabled in 1x mode to save power and improve efciency. the charge pump switches at a fxed frequency of either 250khz or 1mhz. the charge pump switching frequency is set via the sempulse interface by the fsel bit. the 250khz setting is selected by setting fsel = 0, while the 1mhz setting is selected when fsel = 1. the mode selection circuit automatically selects one of the following modes; 1x, 1.5x, or 2x based on circuit condi - tions such as led voltage, input voltage, and load current. the 1x mode is the most efcient of the three modes, fol - lowed by 1.5x and 2x modes. circuit conditions such as low input voltage, high output current, or high led voltage place a higher demand on the charge pump output. a higher numerical mode (1.5x or 2x) may be needed momentarily to maintain regulation at the out pin during intervals of high demand. the charge pump responds to momentary high demands, setting the charge pump to the optimum mode to deliver the output voltage and load current while optimizing efciency. hysteresis is provided to prevent mode toggling. ? ? ? ? the charge pump requires two bucket capacitors. one capacitor must be connected between the c1+ and c1- pins and the other must be connected between the c2+ and c2- pins as shown in the typical application circuit diagram. bucket capacitors should be equal in value to support current sharing between c 1 and c 2 . c out , c in , c 1 , and c 2 capacitors with x7r or x5r ceramic dielectric are strongly recommended for their low esr and superior temperature and voltage characteristics. y5v capacitors should not be used as their temperature coef - fcients make them unsuitable for this application. led backlight current sinks the backlight current is set via the sempulse interface. the current is regulated to one of 32 values between 0ma and 25ma. the step size varies depending upon the current setting. the lowest settings are 0, 50, 100, and 200a. from 0.5ma to 5ma, the step size is 0.5ma. the step size increases to 1ma for settings between 5ma and 21ma. steps are 2ma between 21ma and 25ma. the variation in step size allows fner adjustment for dimming functions in the low current setting range and coarse adjustment at higher current settings where small current changes are not visibly noticeable in led brightness. a zero setting is also included to allow the current sink to be disabled by writing to either the enable bit or the current setting reg - ister for maximum fexibility. all backlight current sinks have matched currents. when there is a variation in the forward voltages (?vf ) of the leds, mis-matched led voltages do not degrade the accu - racy of the backlight currents. the voltages of all bln pins are compared, and the lowest of these voltages is used as feedback for setting the voltage regulation at the out pin. this is done to ensure that sufficient bias exists for all leds. the backlight leds default to the of state upon power-up. for backlight applications using less than six leds, any unused output must be left open and the unused led must remain disabled. when writing to the backlight enable register, a zero (0) must be written to the corre - sponding bit of any unused output. detailed information about programming of the registers is provided in later sections, beginning at sempulse interface on page 21. applications information
SC662 13 charge pump efciency efciency of the charge pump is defned as in in out out i v i v u u k the input current is equal to the output current multiplied by the charge pump mode plus the quiescent current i in = i out x mode + i q , and the output current is equal to the sum of all backlight currents. mode i i bln 6 1 n out u | v out , i out , v in , i in , i q , and i bln are terms from the electrical characteristics section. mode is the active boost ratio of the charge pump, equal to 1, 1.5, or 2. efciency plots in the typical characteristics section provide charge pump efciency data labeled with charge pump. efciency of the power conversion to the leds is defned as in in bln fn 6 1 n i v ) i v ( u u k | v f1 through v f6 are the forward voltages of the leds. i bl1 through i bl6 are the regulated backlight sink currents flowing in the leds. efficiency plots in the typical characteristics section provide led backlight efciency data labeled with backlight. backlight quiescent current the quiescent current required to operate all backlights is reduced when each backlight current is set to 5.0ma or less. this low-current mode feature results in improved efficiency under light-load conditions, saving approxi - mately 350a of bias current. low-current mode disables and bypasses the internal ldo when the charge pump is in 1x mode, connecting the led anodes to the supply at v in . further reduction in quiescent current will result from using fewer than the maximum number of leds. led banks the leds can be grouped in up to three independently controlled led banks. using the sempulse interface, the six led drivers can be grouped as described in the backlight grouping confguration subsection. the banks can be used to provide up to three different current options. this can be useful for controlling keypad, display, and auxiliary backlight operation from one SC662 device. the led banks provide versatility by allowing backlights to be controlled independently. for example, applications that have a main and sub display may also need to supply an indicator led. the three bank option allows the SC662 to control each function with diferent current settings. another application involves backlighting two displays and a keypad, each requiring diferent brightness settings. a third scenario requires supplying diferent brightness levels to diferent types of leds (such as rgb) to create display efects. in all applications, the brightness level for each led can be set independently. backlight fade-in / fade-out function the SC662 contains register bits that control the fade state of the main bank. when enabled, the fade function causes the main backlights to change brightness by stepping the current incrementally until the target backlight current is reached. fade begins immediately after the target back - light current is stored in its register. fade may be enabled for the main bank only. sub and third banks do not fade. in addition to the 32 programmable backlight current values, there are also 75 non-programmable current steps. the non-programmable steps are active only during a fade operation to provide for a very smooth change in backlight brightness. backlight current steps proceed at a program - mable fade rate of 2, 4, or 6ms. the exact length of time used to fade between any two backlight values is determined by multiplying the fade rate by the number of steps between the old and new backlight values. the fade time can be cal - culated from the data provided in table 1 on page 15. figures 2 through 6 on page 16 provide additional infor - mation about the fade process. each fgure represents one linear segment of the overall fade range shown in applications information (continued)
SC662 14 figure 7. the overall fade range is a piece-wise linear, log - rithmic type of function which provides for a very smooth visual fading efect. the fade rate may be changed dynamically when a fade operation is active by writing new values to the fade reg - ister. when a new backlight level is written during an ongoing fade operation, the fade will be redirected to the new value from the present state. an ongoing fade opera - tion may be cancelled by disabling fade, which will result in the backlight current changing immediately to the fnal value. if fade is disabled, the current level will change immediately without the fade delay. the terms blen and fade are used for bits which are defned in a later section of the datasheet. the reader may choose to skip ahead to the register map and register and bit defnitions sections for a better understanding of these terms before continuing with this sections explana - tion of the fade function and fade state diagram. fade state diagram if the main blen bits are disabled during an ongoing fade, the main bank will turn of immediately. when the main blen bits are re-enabled and fade = 1, the main backlight currents will begin at 0ma and fade to the target value. if the main blen bits are re-enabled and fade = 0, the main backlights will proceed immediately to the target value. the state diagram in figure 1 describes the fade operation. more details can be found in the register map section. write either mfade bit = 0 write new bright level no change write new bright level write new brightness level fade is redirected toward the new value from current state fade begins fade ends immediate change to new bright level new rate is used for all remaining steps no change immediate change to new bright level fade continues unchanged write all main bank enable bits = 0 bank turns off immediately fade begins at 0 ma fade processing main bank disabled write either or both mfade bit ( s ) = 1 write mfade 1 and mfade 0 = 0 write a different non - zero value to mfade bits fade is enabled : mfade 1 and / or mfade 0 = 1 write either mfade bit = 1 fade is disabled : mfade 1 and mfade 0 = 0 write either mfade bit = 0 re - write the same value to mfade bits write any main bank enable bit ( s ) = 1 figure 1 fade function state diagram shutdown mode the device is disabled when the spif pin is held low for the shutdown time specifed in the electrical characteris - tics section. all registers are reset to default condition at shutdown. applications information (continued)
SC662 15 starting value (ma) 25.0 106 105 104 102 96 90 88 84 80 76 72 68 64 60 52 47 42 38 34 30 26 24 22 20 18 16 14 12 10 8 4 0 23.0 102 101 100 98 92 86 84 80 76 72 68 64 60 56 48 43 38 34 30 26 22 20 18 16 14 12 10 8 6 4 0 4 21.0 98 97 96 94 88 82 80 76 72 68 64 60 56 52 44 39 34 30 26 22 18 16 14 12 10 8 6 4 2 0 4 8 20.0 96 95 94 92 86 80 78 74 70 66 62 58 54 50 42 37 32 28 24 20 16 14 12 10 8 6 4 2 0 2 6 10 19.0 94 93 92 90 84 78 76 72 68 64 60 56 52 48 40 35 30 26 22 18 14 12 10 8 6 4 2 0 2 4 8 12 18.0 92 91 90 88 82 76 74 70 66 62 58 54 50 46 38 33 28 24 20 16 12 10 8 6 4 2 0 2 4 6 10 14 17.0 90 89 88 86 80 74 72 68 64 60 56 52 48 44 36 31 26 22 18 14 10 8 6 4 2 0 2 4 6 8 12 16 16.0 88 87 86 84 78 72 70 66 62 58 54 50 46 42 34 29 24 20 16 12 8 6 4 2 0 2 4 6 8 10 14 18 15.0 86 85 84 82 76 70 68 64 60 56 52 48 44 40 32 27 22 18 14 10 6 4 2 0 2 4 6 8 10 12 16 20 14.0 84 83 82 80 74 68 66 62 58 54 50 46 42 38 30 25 20 16 12 8 4 2 0 2 4 6 8 10 12 14 18 22 13.0 82 81 80 78 72 66 64 60 56 52 48 44 40 36 28 23 18 14 10 6 2 0 2 4 6 8 10 12 14 16 20 24 12.0 80 79 78 76 70 64 62 58 54 50 46 42 38 34 26 21 16 12 8 4 0 2 4 6 8 10 12 14 16 18 22 26 11.0 76 75 74 72 66 62 58 54 50 46 42 38 34 30 22 17 12 8 4 0 4 6 8 10 12 14 16 18 20 22 26 30 10.0 72 71 70 68 62 58 54 50 46 42 38 34 30 26 18 13 8 4 0 4 8 10 12 14 16 18 20 22 24 26 30 34 9.0 68 67 66 64 58 54 50 46 42 38 34 30 26 22 14 9 4 0 4 8 12 14 16 18 20 22 24 26 28 30 34 38 8.0 64 63 62 60 54 50 46 42 38 34 30 26 22 18 10 5 0 4 8 12 16 18 20 22 24 26 28 30 32 34 38 42 7.0 59 58 57 55 49 45 41 37 33 29 25 21 17 13 5 0 5 9 13 17 21 23 25 27 29 31 33 35 37 39 43 47 6.0 54 53 52 50 44 40 36 32 28 24 20 16 12 8 0 5 10 14 18 22 26 28 30 32 34 36 38 40 42 44 48 52 5.0 46 45 44 42 36 32 28 24 20 16 12 8 4 0 8 13 18 22 26 30 34 36 38 40 42 44 46 48 50 52 56 60 4.5 42 41 40 38 32 28 24 20 16 12 8 4 0 4 12 17 22 26 30 34 38 40 42 44 46 48 50 52 54 56 60 64 4.0 38 37 36 34 28 24 20 16 12 8 4 0 4 8 16 21 26 30 34 38 42 44 46 48 50 52 54 56 58 60 64 68 3.5 34 33 32 30 24 20 16 12 8 4 0 4 8 12 20 25 30 34 38 42 46 48 50 52 54 56 58 60 62 64 68 72 3.0 30 29 28 26 20 16 12 8 4 0 4 8 12 16 24 29 34 38 42 46 50 52 54 56 58 60 62 64 66 68 72 76 2.5 26 25 24 22 16 12 8 4 0 4 8 12 16 20 28 33 38 42 46 50 54 56 58 60 62 64 66 68 70 72 76 80 2.0 22 21 20 18 12 8 4 0 4 8 12 16 20 24 32 37 42 46 50 54 58 60 62 64 66 68 70 72 74 76 80 84 1.5 18 17 16 14 8 4 0 4 8 12 16 20 24 28 36 41 46 50 54 58 62 64 66 68 70 72 74 76 78 80 84 88 1.0 14 13 12 10 4 0 4 8 12 16 20 24 28 32 40 45 50 54 58 62 64 66 68 70 72 74 76 78 80 82 86 90 0.5 10 9 8 6 0 4 8 12 16 20 24 28 32 36 44 49 54 58 62 66 70 72 74 76 78 80 82 84 86 88 92 96 0.2 4 3 2 0 6 10 14 18 22 26 30 34 38 42 50 55 60 64 68 72 76 78 80 82 84 86 88 90 92 94 98 102 0.1 2 1 0 2 8 12 16 20 24 28 32 36 40 44 52 57 62 66 70 74 78 80 82 84 86 88 90 92 94 96 100 104 0.05 1 0 1 3 9 13 17 21 25 29 33 37 41 45 53 58 63 67 71 75 79 81 83 85 87 89 91 93 95 97 101 105 0.0 0 1 2 4 10 14 18 22 26 30 34 38 42 46 54 59 64 68 72 76 80 82 84 86 88 90 92 94 96 98 102 106 0.0 0.05 0.1 0.2 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 17.0 18.0 19.0 20.0 21.0 23.0 25.0 ending value (ma) tablef1ffnumberfoffbacklightffadefstepsfbetweenfvaluesf(seefnote) applications information (continued) note: the fade time is determined by multiplying the number of steps by the fade rate (fade steps fade rate = fade time).
SC662 16 0 5 10 15 20 25 0 20 40 60 80 100 120 step count i b l ( m a ) 0 . 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 2 4 6 8 10 step count i b l ( m a ) 0 . 0 1 . 0 2 . 0 3 . 0 4 . 0 5 . 0 6 . 0 10 20 30 40 50 60 step count i b l ( m a ) 6 . 0 6 . 5 7 . 0 7 . 5 8 . 0 54 56 58 60 62 64 step count i b l ( m a ) 8 9 10 11 12 64 68 72 76 80 step count i b l ( m a ) 12 15 18 21 24 27 80 85 90 95 100 105 110 step count i b l ( m a ) figuref2ffbacklightffadefstepsf(0.0maftof0.5ma) figuref3ffbacklightffadefstepsf(0.5maftof6.0ma) figuref4ffbacklightffadefstepsf(6.0maftof8.0ma) figuref5ffbacklightffadefstepsf(8.0maftof12.0ma) figuref7ffbacklightffadefstepsf(0.0maftof25.0ma) figuref6ffbacklightffadefstepsf(12.0maftof25.0ma) notes: = programmable backlight steps, = non-programmable fade steps applications information (continued)
SC662 17 sleep mode when all leds are disabled, sleep mode is activated. this is a reduced current mode that helps minimize overall current consumption by disabling the clock and the charge pump while continuing to monitor the serial inter - face for commands. an additional current savings can be obtained by putting the serial interface in standby mode (see sempulse interface, standby mode). protection features the SC662 provides several protection features to safe - guard the device from catastrophic failures. these features include: output open circuit protection over-temperature protection charge pump output current limit led float detection output open circuit protection over-voltage protection (ovp) at the out pin prevents the charge pump from producing an excessively high output voltage. in the event of an open circuit between the out pin and all current sinks (no loads connected), the charge pump runs in open loop and the voltage rises up to the ovp limit. ovp operation is hysteretic, meaning the charge pump will momentarily turn off until v out is sufficiently reduced. the maximum ovp threshold is 6.0v, allowing the use of a ceramic output capacitor rated at 6.3v. over-temperature protection the ot (over-temperature) protection circuit prevents the device from overheating and experiencing a catastrophic failure. when the junction temperature exceeds 16 5 c, the device goes into thermal shutdown with all outputs dis - abled until the junction temperature is reduced. all register information is retained during thermal shutdown. hysteresis of 20 c is provided to ensure that the device cools sufciently before re-enabling. charge pump output current limit the device limits the charge pump current at the out pin. if the out pin is shorted to ground, or v out is lower than v uvlo , the typical output current limit is 60ma. the output current is limited to 300ma when over loaded resistively with v out greater than 2.4v. ? ? ? ? led float detection float detect is a fault detection feature of the led backlight outputs. if an output is programmed to be enabled and an open circuit fault occurs at any backlight output, that output will be disabled to prevent a sustained output ovp condition from occurring due to the resulting open loop. float detect ensures device protection but does not ensure optimum performance. unused led outputs must be dis - abled to prevent an open circuit fault from occurring. capacitor selection the SC662 is designed to use low-esr ceramic capaci - tors for the input and output decoupling capacitors as well as the charge pump bucket capacitors. the required value of input and output capacitors can vary with sup - ply and layout conditions, but typically 1f 0402 (1005 metric) size x5r capacitors are sufcient for both c in and c out when 250khz is selected for the charge pump clock. typically 0.47f 0402 size x5r capacitors are sufcient for c in and c out when the charge pump clock is1mhz. table 1 recommended capacitors cap value f case size f pump khz notes c in , c out 1.0 0402 250 recommended for fsel = 0, typical output v pp 40mv at 250khz 0.47 0402 1000 recommended for fsel = 1, typical output v pp 40mv at 1mhz c 1 , c 2 1.0 0402 250 required to provide full rated output current and maintain a low 1.5x2x mode transition point for optimum efciency. 0.47 0402 1000 required to provide full rated output current and maintain a low 1.5x2x mode transition point for optimum efciency. note: use only x5r type capacitors, with a 6.3v rating or higher applications information (continued)
SC662 18 thermal management pcb (printed circuit board) layout directly efects the junc - tion to ambient thermal resistance ( ja ). layout perfor - mance may place limits on the SC662 performance. the SC662 is capable of 150ma of total output current in an ambient temperature of up to 85c. both of these param - eters, maximum output current (i out(max) ), and maximum ambient temperature (t a ), may be reduced if the layout does not provide for adequate heat dissipation. layout guidelines are recommended in the next section, pcb layout considerations. applications information (continued)
SC662 19 pcb layout considerations following fundamental layout rules is critical for achieving the performance specifed in the electrical characteristics table. a recommended layout is illustrated in figures 8, 9, and 10. figure 8 shows a composite view of the two copper layers plus components, vias, and text descriptors. figure 9 shows the copper layer on the component side of the board, and figure 10 is the copper layer for ground and routing. the following guidelines are recommended when devel - oping a pcb layout: place all capacitors (c1, c2, cin, and cout) as close to the device as possible, and on the same side of the board as the SC662. cin, cout should have their grounds connected at one point as shown in figure 8, with multiple vias to ground. c1 and c2 should be placed so that they do not require vias to connect to the SC662. all charge pump current passes through pins in, out, c1-, c1+, c2+, and c2-. ensure that all con - nections to these pins use wide traces. layout should minimize the resistance and inductance of these traces. make all ground connections to a ground plane as shown in the example layout. there should be a short unobstructed path between all ground vias on the ground plane. the power trace connecting the battery to the in pin should be sized for 300ma of battery current. the power trace should be on a layer adjacent to the ground return. if possible, make the power trace equal in width to the ground return trace. the output trace connecting the out pin to the anode terminals of the leds should be sized for 150ma of dc current. up to six led traces connect between the led cathodes and the bln pins. each led trace width should be sized for 25ma of dc current. the led traces route in parallel on one layer and serve as ? ? ? ? ? ? ? ? the return current path from the leds to the bln pins. figure 8 is representative of a two layer design. as shown in this figure, the out trace can be placed next to the six led traces on the same layer. however, if more than two layers are avail - able, the preferred method is to have the out trace route underneath the led traces on a dif - ferent layer. double vias are preferred for grounding pin 3 of the SC662, and also for grounding the ground leads of cin and cout. the spif trace should be routed away from sources of noise to preserve the signal integrity for the sempulse interface. multiple vias are recommended for the thermal pad at the center of the device. c 2 c 1 sc 662 ground layer vias to ground plane c in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 bl 6 spif gnd c 1 - c 2 - c 2 + c 1 + in bl 1 bl 2 bl 3 bl 4 bl 5 out c out out to led anodes positive from battery ground return to battery to led 1 to led 2 to led 3 to led 4 to led 5 to led 6 to spif output figure 8 recommended pcb layout ? ? ? ? applications information (continued)
SC662 20 vias to ground plane figuref9ffcomponentflayer figuref10ffgroundflayer applications information (continued)
SC662 21 sempulse tm interface introduction sempulse is a write-only single wire interface. it provides the capability to access up to 32 registers that control device functionality. two sets of pulse trains are transmit - ted via the spif pin. the frst pulse set is used to set the desired address. after the bus is held high for the address hold period, the next pulse set is used to write the data value. after the data pulses are transmitted, the bus is held high again for the data hold period to signify the data write is complete. at this point the device latches the data into the address that was selected by the frst set of pulses. see the sempulse timing diagrams for descriptions of all timing parameters. chip enable/disable the device is enabled when the sempulse interface pin (spif) is pulled high for greater than t su . if the spif pin is pulled low again for more than t sd , the device will be disabled. address writes the frst set of pulses can range between 0 and 31 (or 1 to 32 rising edges) to set the desired address. after the pulses are transmitted, the spif pin must be held high for t holda to signal to the slave device that the address write is fnished. if the pulse count is between 0 and 31 and the line is held high for t holda , the address is latched as the destination for the next data write. if the spif pin is not held high for t holda , the slave device will continue to count pulses. note that if t holda exceeds its maximum specifca - tion, the bus will reset. this means that the communication is ignored and the bus resumes monitoring the pin, expecting the next pulse set to be an address. if the total exceeds 31 pulses, spif must be held high until the bus reset time t br is exceeded before commencing communication. data writes after the bus has been held high for the minimum address hold period, the next set of pulses are used to write the data value. the total number of pulses can range from 0 to 63 (or 1 to 64 rising edges) since there are a total of 6 register bits per register. just like with the address write, the data write is only accepted if the bus is held high for t holdd when the pulse train is completed. if the proper hold time is not received, the interface will keep counting pulses until the hold time is detected. if the total exceeds 63 pulses, the write will be ignored and the bus will reset after the next valid hold time is detected. after the bus has been held high for t holdd , the bus will expect the next pulse set to be an address write. note that this is the same efect as the bus reset that occurs when t holda exceeds its maximum specification. for this reason, there is no maximum limit on t holdd the bus simply waits for the next valid address to be transmitted. multiple writes it is important to note that this single-wire interface requires the address to be paired with its corresponding data. if it is desired to write multiple times to the same address, the address must always be re-transmitted prior to the corresponding data. if it is only transmitted one time and followed by multiple data transmissions, every other block of data will be treated like a new address. the result will be invalid data writes to incorrect addresses. note that multiple writes only need to be separated by the minimum t holdd for the slave to interpret them cor - rectly. as long as t holda between the address pulse set and the data pulse set is less than its maximum specifcation but greater than its minimum, multiple pairs of address and data pulse counts can be made with no detrimental efects. standby mode once data transfer is completed, the spif line must be returned to the high state for at least 10ms to return to the standby mode. in this mode, the spif line remains idle while monitoring for the next command. this mode allows the device to minimize current consumption between commands. once the device has returned to standby mode, the bus is automatically reset to expect the address pulses as the next data block. this safeguard is intended to reset the bus to a known state (waiting for the beginning of a write sequence) if the delay exceeds the reset threshold.
SC662 22 sempulse tm interface (continued) sempulse timing diagrams the sempulse single wire interface is used to enable or disable the device and confgure all registers (see figure 11). the timing parameters refer to the digital i/o electrical specifcations. t lo t hi t = t su t = t holda t = t holdd address is set data is written spif up to 32 rising edges ( 0 to 31 pulses ) up to 64 rising edges ( 0 to 63 pulses ) figure 11 uniform timing diagram for sempulse communication timing example 1 in this example (see figure 12), the slave chip receives two sets of pulses to set the address and data, and the pulses experience interrupts that cause the pulse width to be nonuniform. note that as long as the maximum high and low times are satisfed and the hold times are within specifcation, the data transfer is completed regardless of the number of interrupts that delay the transmission. t hi t lo t < t himax t < t lomax t = t su data written is 000011 spif t = t holda t = t holdd address is set to register 02 h figure 12 sempulse data write with non-uniform pulse widths timing example 2 in this example (see figure 13), the slave chip receives two sets of pulses to set the address and data, but an interrupt occurs during a pulse that causes it to exceed the minimum address hold time. the write is meant to be the value 03h in register 05h, but instead it is interpreted as the value 02h written to register 02h. the extended pulse that is delayed by the interrupt triggers a false address detection, causing the next pulse set to be interpreted as the data set. to avoid any problems with timing, make sure that all pulse widths comply with their timing requirements as outlined in this datasheet. data written is 000010 spif t > t himax t = t holdd address is set to register 02 h interrupt duration t = t holda address is set to register 03 h ( address and data are now out of order ) figure 13 faulty sempulse data write due to extended interrupt duration
SC662 23 address d5 d4 d3 d2 d1 d0 reset value description 00h blen6 blen5 blen4 blen3 blen2 blen1 00h backlight enable 01h 0 (2) mbl4 mbl3 mbl2 mbl1 mbl0 00h main backlight current 02h 0 (2) sbl4 sbl3 sbl2 sbl1 sbl0 00h sub backlight current 03h 0 (2) tbl4 tbl3 tbl2 tbl1 tbl0 00h third backlight current 04h 0 (2) 0 (2) 0 (2) 0 (2) mfade1 mfade0 00h main fade 05h 0 (2) 0 (2) fsel mb2 mb1 mb0 00h frequency and banking confgurations registers and bit defnitions bl enable control register (00h) this register enables each individual led. blen6 blen1 [d5:d0] these active high bits enable the six backlight drivers. each led can be controlled independently. notes: (1) all registers are write-only. (2) 0 = always write a 0 to these bits register map (1)
SC662 24 register and bit defnitions (continued) main backlight current control register (01h) this register is used to set the currents for the backlight current sinks assigned to the main backlight group. this group can also be used to control red leds for limited rgb control. these current sinks need to be enabled in the backlight enable control register to be active. bit d5 this bit is unused and is always a zero, so the maximum pulse count for this register is 31. mbl4 mbl0 [d4:d0] these bits are used to set the current for the main back - light current sinks. all enabled main backlight current sinks will sink the same current, as shown in table 2. table 2 main backlight current settings mbl4 mbl3 mbl2 mbl1 mbl0 backlight current (ma) 0 0 0 0 0 0 0 0 0 0 1 0.05 0 0 0 1 0 0.1 0 0 0 1 1 0.2 0 0 1 0 0 0.5 0 0 1 0 1 1.0 0 0 1 1 0 1.5 0 0 1 1 1 2.0 0 1 0 0 0 2.5 0 1 0 0 1 3.0 0 1 0 1 0 3.5 0 1 0 1 1 4.0 0 1 1 0 0 4.5 0 1 1 0 1 5.0 0 1 1 1 0 6.0 0 1 1 1 1 7.0 1 0 0 0 0 8.0 1 0 0 0 1 9.0 1 0 0 1 0 10 1 0 0 1 1 11 1 0 1 0 0 12 1 0 1 0 1 13 1 0 1 1 0 14 1 0 1 1 1 15 1 1 0 0 0 16 1 1 0 0 1 17 1 1 0 1 0 18 1 1 0 1 1 19 1 1 1 0 0 20 1 1 1 0 1 21 1 1 1 1 0 23 1 1 1 1 1 25
SC662 25 register and bit defnitions (continued) sub backlight current control register (02h) this register is used to set the currents for the backlight current sinks assigned to the sub backlight group. this group can also be used to control green leds for limited rgb control. these current sinks need to be enabled in the backlight enable control register to be active. bit d5 this bit is unused and is always a zero, so the maximum pulse count for this register is 31. sbl4 sbl0 [d4:d0] these bits are used to set the current for the sub backlight current sinks. all enabled sub backlight current sinks will sink the same current, as shown in table 3. table 3 sub backlight current settings sbl4 sbl3 sbl2 sbl1 sbl0 backlight current (ma) 0 0 0 0 0 0 0 0 0 0 1 0.05 0 0 0 1 0 0.1 0 0 0 1 1 0.2 0 0 1 0 0 0.5 0 0 1 0 1 1.0 0 0 1 1 0 1.5 0 0 1 1 1 2.0 0 1 0 0 0 2.5 0 1 0 0 1 3.0 0 1 0 1 0 3.5 0 1 0 1 1 4.0 0 1 1 0 0 4.5 0 1 1 0 1 5.0 0 1 1 1 0 6.0 0 1 1 1 1 7.0 1 0 0 0 0 8.0 1 0 0 0 1 9.0 1 0 0 1 0 10 1 0 0 1 1 11 1 0 1 0 0 12 1 0 1 0 1 13 1 0 1 1 0 14 1 0 1 1 1 15 1 1 0 0 0 16 1 1 0 0 1 17 1 1 0 1 0 18 1 1 0 1 1 19 1 1 1 0 0 20 1 1 1 0 1 21 1 1 1 1 0 23 1 1 1 1 1 25
SC662 26 register and bit defnitions (continued) third backlight current control register (03h) this register is used to set the currents for the backlight current sinks assigned to the third backlight group. this group can also be used to control blue leds for limited rgb control. these current sinks need to be enabled in the backlight enable control register to be active. bit d5 this bit is unused and is always a zero, so the maximum pulse count for this register is 31. tbl4 tbl0 [d4:d0] these bits are used to set the current for the third back - light current sinks. all enabled third backlight current sinks will sink the same current, as shown in table 4. table 4 third backlight current control bits tbl4 tbl3 tbl2 tbl1 tbl0 backlight current (ma) 0 0 0 0 0 0 0 0 0 0 1 0.05 0 0 0 1 0 0.1 0 0 0 1 1 0.2 0 0 1 0 0 0.5 0 0 1 0 1 1.0 0 0 1 1 0 1.5 0 0 1 1 1 2.0 0 1 0 0 0 2.5 0 1 0 0 1 3.0 0 1 0 1 0 3.5 0 1 0 1 1 4.0 0 1 1 0 0 4.5 0 1 1 0 1 5.0 0 1 1 1 0 6.0 0 1 1 1 1 7.0 1 0 0 0 0 8.0 1 0 0 0 1 9.0 1 0 0 1 0 10 1 0 0 1 1 11 1 0 1 0 0 12 1 0 1 0 1 13 1 0 1 1 0 14 1 0 1 1 1 15 1 1 0 0 0 16 1 1 0 0 1 17 1 1 0 1 0 18 1 1 0 1 1 19 1 1 1 0 0 20 1 1 1 0 1 21 1 1 1 1 0 23 1 1 1 1 1 25
SC662 27 main fade control (04h) this register sets the fade status and rate for the main backlight group. bits [d5:d2] these bits are unused and are always zeros, so the maximum pulse count for this register is 3. mfade1, mfade0[d1:d0] these bits are used to enable fade and set the fade rate between two backlight currents as shown in table 5. table 5 main display fade control bits mfade1 mfade0 fade feature rise ? fall rate (ms? step) 0 0 off 0 1 2 1 0 4 1 1 6 when the fade rate is set to 2, 4, or 6ms and then a new backlight current is set, the backlight current will change from its current value to the new value in steps, pausing at each step for the duration of the fade rate before proceed - ing to the next step. the exact length of time used to fade between any two backlight values is determined by multi - plying the fade rate by the number of steps between the old and new backlight values. the fade time can be calculated from the data provided in table 1 on page 15. backlight grouping confguration (05h) this register assigns the leds to the backlight bank confgurations. bits [d5:d4] these bits are unused and are always zeros, so the maximum pulse count for this register is 16. fsel [d3] this bit sets the charge pump clock frequency. fsel = 0 for 250khz, and fsel = 1 for 1mhz. the default state for this bit is zero. mb2 and mb0 [d2:d0] these bits are used to set the number of led drivers dedi - cated to each backlight group. this allows the device to drive up to three different sets of leds with different current settings. note that any driver assigned to any led group can still be disabled independently if not needed. the code set by these bits determines how the led drivers are assigned among the three led groups according to the assignments listed in table 6. default state for each of these three bits is zero (all leds assigned to main display). table 6 backlight grouping confguration mb2 mb1 mb0 main display led drivers sub display led drivers third display led drivers 0 0 0 bl1-bl6 0 0 1 bl1-bl3 bl4-bl6 0 1 0 bl1-bl2 bl3-bl4 bl5-bl6 0 1 1 bl1-bl2, bl5-bl6 bl3 bl4 1 0 0 bl1-bl3 bl4-bl5 bl6 1 0 1 bl1-bl4 bl5-bl6 1 1 x bl1-bl5 bl6 register and bit defnitions (continued)
SC662 28 outline drawing mlpq-ut-14 2x2 controlling dimensions are in millimeters ( angles in degrees ). 1 . pin 1 indicator ( laser mark ) a b aaa c c seating plane bbb c a b 1 n d e a dimensions a n aaa bbb l e d e a 2 a 1 b dim - 0 . 60 0 . 50 0 . 40 bsc ( 0 . 152 ) 0 . 30 14 0 . 10 0 . 08 0 . 35 0 . 15 1 . 90 0 . 00 0 . 20 2 . 00 - 0 . 40 0 . 25 2 . 10 0 . 05 nom millimeters min max 1 . 90 2 . 00 2 . 10 d 1 0 . 65 0 . 80 0 . 90 e 1 0 . 65 0 . 80 0 . 90 2 0 . 34 0 . 68 notes : a 1 2 . coplanarity applies to the exposed pad as well as the terminals . a 2 d 1 bxn e d / 2 e / 2 lxn e 1
SC662 29 dimensions p z x y c g dim millimeters failure to do so may compromise the thermal and / or functional performance of the device . shall be connected to a system ground plane . thermal vias in the land pattern of the exposed pad 3 . h 0 . 80 k 0 . 80 1 . controlling dimensions are in millimeters ( angles in degrees ). 4 . square package - dimensions apply in both " x " and " y " directions . p x k h 0 . 65 2 . 60 ( 1 . 95 ) 1 . 30 0 . 20 0 . 40 this land pattern is for reference purposes only . consult your manufacturing group to ensure your company ' s manufacturing guidelines are met . notes : 2 . 0 . 34 0 . 68 ( c ) g y z land pattern mlpq-ut-14 2x2
semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805) 498-2111 fax: (805) 498-3804 www.semtech.com contact information SC662 30 ? semtech 2010 all rights reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any conse - quence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellec - tual property rights. semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specifed maximum ratings or operation outside the specifed range. semtech products are not designed, intended, authorized or warranted to be suitable for use in life- support applications, devices or systems or other critical applications. inclusion of semtech products in such applications is understood to be undertaken solely at the customers own risk. should a customer purchase or use semtech products for any such unauthorized application, the customer shall indemnify and hold semtech and its ofcers, employees, subsidiaries, afliates, and distributors harmless against all claims, costs damages and attorney fees which could arise. notice: all referenced brands, product names, service names and trademarks are the property of their respective owners.

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